52古典>英语词典>soft-core翻译和用法

soft-core

英 [ˈsɒft kɔː(r)]

美 [ˈsɔːft kɔːr]

adj.  软性色情的; (性描写等)隐晦的,含蓄的

牛津词典

    adj.

    • 软性色情的;(性描写等)隐晦的,含蓄的
      showing or describing sexual activity without being too detailed or shocking

      柯林斯词典

      • (性描写)非赤裸裸的,较隐晦的
        Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.

        双语例句

        • A 40Gb/ s switch IP soft-core with self-dependence intellectual property was realized.
          形成了具有自主知识产权的40Gb/s交换IP软核。
        • The paper built a soft core processor which named NIOS II in the FPGA by using SOPC technology, and running μ C/ OS-ⅱ operating system on the NIOS II soft-core in order to achieve the scheduling of the system task.
          通过使用SOPC技术,在FPGA内部构建了NIOSⅡ软核处理器,并在NIOSⅡ软核上运行μC/OS-Ⅱ操作系统,从而实现了对系统任务的调度。
        • Research and Design of Nios ⅱ Soft-core Processor
          NiosⅡ软核处理器的研究与设计
        • Designed the inter-frame decoding IP soft-core, including the motion vector generation module, prediction processing modules and interpolation modules.
          详细设计了帧间解码IP软核,包括运动矢量生成模块、预测处理模块和插值模块。
        • This paper proposes a new method for embedded system designing, based on FPGA and soft-core CPU.
          提出了一种基于FPGA(现场可编程门阵列)和软核CPU的嵌入式系统设计的新方法。
        • For the digital part, this design is mean to construct the SOPC system in the FPGA, embedded Nios II soft-core processor to control the operation of the entire system.
          对于数字部分,在FPGA内构建SOPC系统,嵌入NIOSii软核处理器对整个系统进行控制。
        • This paper introduces 8B/ 10B encoding technique, and puts forward a simple and practical realization method of an 8B/ 10B encoder. Furthermore, a versatile soft-core designed with Verilog is presented.
          本文介绍了8B/10B编码技术,提出了一种简单、实用的8B/10B编码器的实现方法,并且采用Verilog语言设计了一种通用的软核。
        • SOPC includes soft-core or hard-core CPU 、 memory 、 I/ O and programmable logic resource, which has all the advantage of SOC 、 PLD and FPGA.
          SOPC综合了SOC、PLD和FPGA的优点,集成了硬核或软核CPU、存储器、I/O以及可编程逻辑。
        • With the establishing of verification and test platform for SDH chip, We realize the function simulation, timing simulation and performance test of the IP soft-core.
          通过建立SDH芯片验证平台和SDH芯片测试平台,实现IP软核的功能仿真、时序仿真和芯片性能测试。
        • Implementing the synchronization of industrial Ethernet precise clock based on Nios II soft-core
          基于NiosⅡ软核的工业以太网精确时钟同步的实现