soft-core
英 [ˈsɒft kɔː(r)]
美 [ˈsɔːft kɔːr]
adj. 软性色情的; (性描写等)隐晦的，含蓄的
牛津词典
adj.
- 软性色情的；（性描写等）隐晦的，含蓄的
showing or describing sexual activity without being too detailed or shocking
柯林斯词典
- (性描写)非赤裸裸的，较隐晦的
Soft-corepornography shows or describes sex, but not very violent or unpleasant sex, or not in a very detailed way.
双语例句
- According to the structure model of data acquisition and processing system connected by Ethernet, the network interface module based on the Nios soft-core system is designed to construct the network data acquisition system.
为构建网络化的数据采集系统，根据数据采集模块与处理控制模块通过以太网相连接的结构模型，设计了基于Nios软核系统的嵌入式以太网网络接口模块。 - Design and Implementation of Multi-channel Phone-billing-system Based upon NIOS Soft-core CPU
基于NIOS软核CPU技术的多路电话计费系统的设计与实现 - First some algorithms of gray-scale quantifying are analysised and simulated, and then the detailed designs of complex mold sub-module, quantifying sub-module and SDRAM soft-core controller is presented. 4.
先对灰度量化算法进行了分析和仿真比较，然后详细介绍了复数求模子模块、量化子模块、SDRAM控制器的设计。 - First, use of the system functions on a single chip design ideas, using a high-performance soft-core processor ( Nios II CPU) and IP multiplexing and improve the whole system to further improve the speed and flexibility.
第一，运用了在单芯片上实现系统功能的设计思想，采用了高性能的软核处理器（NiosIICPU）和IP复用技术，提高了整个系统的运行速度和进一步改进的灵活性。 - Designed the inter-frame decoding IP soft-core, including the motion vector generation module, prediction processing modules and interpolation modules.
详细设计了帧间解码IP软核，包括运动矢量生成模块、预测处理模块和插值模块。 - Nios II soft-core processor implanted into FPGA as the control chip controls and preprocesses the data of the entire image acquisition system.
采用FPGA作为控制芯片，在其中植入NiosⅡ软核处理器以对整个图像采集系统的数据进行控制和预处理。 - With the establishing of verification and test platform for SDH chip, We realize the function simulation, timing simulation and performance test of the IP soft-core.
通过建立SDH芯片验证平台和SDH芯片测试平台，实现IP软核的功能仿真、时序仿真和芯片性能测试。 - Implementation of Soft-Core Processor and DDFS Based on FPGA
基于FPGA的软核处理器及DDFS实现 - The paper built a soft core processor which named NIOS II in the FPGA by using SOPC technology, and running μ C/ OS-ⅱ operating system on the NIOS II soft-core in order to achieve the scheduling of the system task.
通过使用SOPC技术，在FPGA内部构建了NIOSⅡ软核处理器，并在NIOSⅡ软核上运行μC/OS-Ⅱ操作系统，从而实现了对系统任务的调度。 - Then, through the embedded soft-core processor technology based on FPGA, entire system the control, and processing and transmission of data of were achieved by using the co-design approach of hardware and software.
然后，通过基于FPGA的嵌入式软核处理器技术，采用软硬件协同设计的方法，实现对整个系统功能的控制及数据的处理与发送。